About the roleEnsure quality/performance of complex digital designs through rigorous verification; develop/execute plans, build reusable UVM testbenches, write sequences, debug, and collaborate with RTL/fw/app engineering.Base salary range is $130,000 – $160,000 a year. Eligible for bonus, equity, and full benefits.Responsibilities- Develop verification/test plans; build SV‑UVM environments; verify PCIe subsystems/interfaces; write assertions/checkers/coverage; analyze coverage; firmware‑based simulations in C; reproduce silicon failures; automate with Python/Perl/Shell.Qualifications- BS/MS EE/CE; 7+ years SV/UVM; PCIe verification; gate‑level/firmware‑based simulation; RTL and computer architecture; strong debugging; cross‑functional collaboration.